#ifndef _PARTHUS_HW_RADIO_
#define _PARTHUS_HW_RADIO_

/******************************************************************************
 * MODULE NAME:    hw_radio.h
 * PROJECT CODE:   BlueStream
 * DESCRIPTION:    Generic RF/DSP hardware abstraction layer
 * MAINTAINER:     Ivan Griffin
 * DATE:           20 March 2000
 *
 * SOURCE CONTROL: $Id: hw_radio.h,v 1.23 2008/11/08 07:30:01 tianwq Exp $
 *
 * LICENSE:
 *     This source code is copyright (c) 2000-2004 Ceva Inc.
 *     All rights reserved.
 *
 ******************************************************************************/

#include "sys_config.h"
#include "lc_types.h"
#include "hw_macro_defs.h"

#define BB_SW_RX_INDEPENDENT       

#define BB_PAON_INDEPENDENT         

#define BBARMIC_RESET_MODIFICATION


/********************************************************************************
 *      Local Constants / Macro Definitions
 ********************************************************************************/
/* Temporary define to allow for the change of assignment of GIOs
   This GIO arrangement was first tested with a sof file from the 2nd nov 2001 */

#define HW_RADIO_SLOT_TIME_POS_TX_START          0
#define HW_RADIO_SLOT_TIME_POS_TX_MID            312
#define HW_RADIO_SLOT_TIME_POS_RX_START          625
#define HW_RADIO_SLOT_TIME_POS_RX_MID            937 
#define HW_RADIO_TOTAL_SLOT_TIME                 1250
 

/********************************************************************************
 *
 * The following definitions define the time for GIO line transitions
 * as are required by the particular radio. They are define using 
 * constants values that come from the custom radio eader file.
 *
 ********************************************************************************/
#define RADIO_SETUP_TIME                                   Driver_Data.radio_setup_time  

#define RADIO_TX_SETUP_TIME                                Driver_Data.tx_setup_time   

#define RADIO_TX_LOW_SETUP_TIME                            Driver_Data.tx_low_time   

#define RADIO_PAON_SETUP_TIME                              Driver_Data.paon_setup_time  

#define RADIO_PAON_LOW_SETUP_TIME                          Driver_Data.paon_low_time  

#define RADIO_RX_SETUP_TIME                                Driver_Data.rx_setup_time   

#define RADIO_RX_LOW_SETUP_TIME                            Driver_Data.rx_low_time   
                                                           
#define RX_DOUB_LOW_SETUP_TIME                             Driver_Data.rx_doub_low_time  

#define MASTER_DOUB_HOP_TX1_HIGH                           0x04B0
#define MASTER_DOUB_HOP_TX1_LOW                            0x0064
                                                           
#define MASTER_DOUB_HOP_TX2_HIGH                           0x0106
#define MASTER_DOUB_HOP_TX2_LOW                            0x019C
                                                           
#define MASTER_DOUB_HOP_RX1_HIGH                           0x023F
#define MASTER_DOUB_HOP_RX1_LOW                            0x02D5
                                                           
#define MASTER_DOUB_HOP_RX2_HIGH                           0x0376
#define MASTER_DOUB_HOP_RX2_LOW                            0x040D
                                                           
#define MASTER_DOUB_TXEN1_HIGH                             (0x04DD - RADIO_TX_SETUP_TIME)    
#define MASTER_DOUB_TXEN1_LOW                              (0x115 - RADIO_TX_LOW_SETUP_TIME)   
                                                           
#define MASTER_DOUB_TXEN2_HIGH                             (0x0134 - RADIO_TX_SETUP_TIME)    
#define MASTER_DOUB_TXEN2_LOW                              (0x24D - RADIO_TX_LOW_SETUP_TIME)   
                                                           
#define MASTER_DOUB_RXEN1_HIGH                             (0x026C - RADIO_RX_SETUP_TIME)    
#define MASTER_DOUB_RXEN1_LOW                              (0x386 - RX_DOUB_LOW_SETUP_TIME)   
                                                           
#define MASTER_DOUB_RXEN2_HIGH                             (0x03A4 - RADIO_RX_SETUP_TIME)    
#define MASTER_DOUB_RXEN2_LOW                              (0x4BE - RX_DOUB_LOW_SETUP_TIME)   
                                                           
#define TX_RX_HOP_TX_HIGH                                  0x04B0
#define TX_RX_HOP_TX_LOW                                   0x01A9
                                                           
#define TX_RX_HOP_RX_HIGH                                  0x023F
#define TX_RX_HOP_RX_LOW                                   0x0410

#define TX_RX_TXEN_HIGH                                    (0x04DD - RADIO_TX_SETUP_TIME)    
#define TX_RX_RXEN_HIGH                                    (0x026C - RADIO_RX_SETUP_TIME)    
                                                           
                                                           
#define TX_RX_TXEN_LOW                                     (0x0240 - RADIO_TX_LOW_SETUP_TIME)     
                                                           
#define TX_RX_RXEN_LOW                                     (0x04BE - RADIO_RX_LOW_SETUP_TIME)     


#define MASTER_DOUB_PAON1_HIGH                             (0x04DD - RADIO_PAON_SETUP_TIME)
#define MASTER_DOUB_PAON1_LOW                              (0x115 - RADIO_PAON_LOW_SETUP_TIME)   
                                                           
#define MASTER_DOUB_PAON2_HIGH                             (0x0134 - RADIO_PAON_SETUP_TIME)
#define MASTER_DOUB_PAON2_LOW                              (0x24D - RADIO_PAON_LOW_SETUP_TIME)   
                                                           
#define TX_RX_PAON_HIGH                                    (0x04DD - RADIO_PAON_SETUP_TIME)
                                                           
#define TX_RX_PAON_LOW                                     (0x0240 - RADIO_PAON_LOW_SETUP_TIME)



#define FULL_RX_GIO_RESET_HIGH                             0x0271
#define FULL_RX_GIO_RESET_LOW                              0x0272
                                                           
#define SLAVE_RESP_HOP_TX_HIGH                             0x04B0
#define SLAVE_RESP_HOP_TX_LOW                              0x0064
                                                           
#define SLAVE_RESP_HOP_RX_HIGH                             0x0106
#define SLAVE_RESP_HOP_RX_LOW                              0x041A
                                                           
#define SLAVE_RESP_TXEN_HIGH                               0x04DD
#define SLAVE_RESP_TXEN_LOW                                0x0046
                                                           
#define GIO_OVERRIDE                                       (u_int32)0x8000


/*************************************************************************************
 *
 *  The following is a defines the allocation of GIO lines.
 *
 *
 *
 *************************************************************************************/

#define HW_RADIO_GIO_HIGH_TXEN                            HAB_GIO_HIGH_CTRL_1_AND_0_REG
#define HW_RADIO_GIO_LOW_TXEN                             HAB_GIO_LOW_CTRL_1_AND_0_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_TXEN                   0x00008000
                                                          
                                                          
#define HW_RADIO_GIO_HIGH_RXEN                            HAB_GIO_HIGH_CTRL_1_AND_0_REG
#define HW_RADIO_GIO_LOW_RXEN                             HAB_GIO_LOW_CTRL_1_AND_0_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_RXEN                   0x80000000

#define HW_RADIO_GIO_HIGH_SW_TXEN                          HAB_GIO_HIGH_CTRL_3_AND_2_REG
#define HW_RADIO_GIO_LOW_SW_TXEN                           HAB_GIO_LOW_CTRL_3_AND_2_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SW_TXEN                 0x00008000

#define HW_RADIO_GIO_HIGH_SW_RXEN                          HAB_GIO_HIGH_CTRL_3_AND_2_REG
#define HW_RADIO_GIO_LOW_SW_RXEN                           HAB_GIO_LOW_CTRL_3_AND_2_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SW_RXEN                 0x80000000

#define HW_RADIO_GIO_HIGH_PAON                             HAB_GIO_HIGH_CTRL_5_AND_4_REG
#define HW_RADIO_GIO_LOW_PAON                              HAB_GIO_LOW_CTRL_5_AND_4_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_PAON                    0x00008000

#define HW_RADIO_GIO_HIGH_TPDN                             HAB_GIO_HIGH_CTRL_5_AND_4_REG
#define HW_RADIO_GIO_LOW_TPDN                              HAB_GIO_LOW_CTRL_5_AND_4_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_TPDN                    0x80000000


#define HW_RADIO_GIO_HIGH_SECOND_TXEN                      HAB_GIO_HIGH_CTRL_7_AND_6_REG
#define HW_RADIO_GIO_LOW_SECOND_TXEN                       HAB_GIO_LOW_CTRL_7_AND_6_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SECOND_TXEN             0x00008000

#define HW_RADIO_GIO_HIGH_SECOND_RXEN                      HAB_GIO_HIGH_CTRL_7_AND_6_REG
#define HW_RADIO_GIO_LOW_SECOND_RXEN                       HAB_GIO_LOW_CTRL_7_AND_6_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SECOND_RXEN             0x80000000

#define HW_RADIO_GIO_HIGH_SECOND_SW_TXEN                   HAB_GIO_HIGH_CTRL_9_AND_8_REG
#define HW_RADIO_GIO_LOW_SECOND_SW_TXEN                    HAB_GIO_LOW_CTRL_9_AND_8_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SECOND_SW_TXEN          0x00008000

#define HW_RADIO_GIO_HIGH_SECOND_SW_RXEN                   HAB_GIO_HIGH_CTRL_9_AND_8_REG
#define HW_RADIO_GIO_LOW_SECOND_SW_RXEN                    HAB_GIO_LOW_CTRL_9_AND_8_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SECOND_SW_RXEN          0x80000000


#define HW_RADIO_GIO_HIGH_SECOND_PAON                      HAB_GIO_HIGH_CTRL_B_AND_A_REG
#define HW_RADIO_GIO_LOW_SECOND_PAON                       HAB_GIO_LOW_CTRL_B_AND_A_REG
#define HW_RADIO_GIO_OVERRIDE_MASK_SECOND_PAON             0x00008000





/********************************************************************************
 *      GIO override macros
 ********************************************************************************/
#define HWradio_SetOverrideLow(GIO_NAME)    \
                mHWreg_Logical_OR_With_Register(HW_RADIO_GIO_LOW_##GIO_NAME, HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME); \
                mHWreg_Logical_AND_With_Register(HW_RADIO_GIO_HIGH_##GIO_NAME, ~(HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME)) 

#define HWradio_SetOverrideHigh(GIO_NAME)    \
                mHWreg_Logical_OR_With_Register(HW_RADIO_GIO_HIGH_##GIO_NAME, HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME); \
                mHWreg_Logical_AND_With_Register(HW_RADIO_GIO_LOW_##GIO_NAME, ~(HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME)) 

#define HWradio_CancelOverride(GIO_NAME) \
                mHWreg_Logical_AND_With_Register(HW_RADIO_GIO_LOW_##GIO_NAME, ~(HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME)); \
                mHWreg_Logical_AND_With_Register(HW_RADIO_GIO_HIGH_##GIO_NAME, ~(HW_RADIO_GIO_OVERRIDE_MASK_##GIO_NAME))

/***************************************************************************
 *
 * HWradio Typedefs
 *
 ***************************************************************************/
typedef enum
{
    HWradio_RXm_NORMAL = 0,
    HWradio_RXm_FULL_WIN = 1
} t_HWradio_Rx_Mode;

typedef enum
{
    Power_Down_Mode_Active,
    Power_Down_Mode_Not_Active
} t_HWradio_Driver_Status;

typedef u_int8 t_radio_freq_mask;

#define RADIO_FREQ_MASK(X)    ((t_radio_freq_mask)(1 << (X)))

#define TX_START_FREQ    RADIO_FREQ_MASK(TX_START)
#define TX_MID_FREQ        RADIO_FREQ_MASK(TX_MID)
#define RX_START_FREQ    RADIO_FREQ_MASK(RX_START)
#define RX_MID_FREQ        RADIO_FREQ_MASK(RX_MID)

typedef enum {
    RADIO_MODE_STANDBY,
    RADIO_MODE_FULL_RX,
    RADIO_MODE_MASTER_DOUBLE_WIN,
    RADIO_MODE_TX_RX,
    RADIO_MODE_SLAVE_PAGE_RESP
}t_RadioMode;

typedef enum
{
    HWradio_SERV_RX = 0,
    HWradio_SERV_DISABLE_RX ,
    HWradio_SERV_TX,
    HWradio_SERV_DISABLE_TX ,
    HWradio_SERV_RX_TX
}t_RadioServiceType;


typedef struct T_RADIO
{
    u_int8  tx_delay;
    u_int8  rx_delay;
    s_int8  rssi_base;
    u_int8  min_power;    
    u_int8  radio_setup_time;
    u_int8  tx_setup_time;
    u_int8  tx_low_time;
    u_int8  paon_setup_time;
    u_int8  paon_low_time;
    u_int8  rx_setup_time;
    u_int8  rx_low_time;
    u_int8  rx_doub_low_time;
}t_radio_driver;

typedef enum
{
    HWradio_ADGC_HWCTRL,
    HWradio_ADGC_SWCTRL
}t_ADGC_CTRL_MODE;

#define HW_RADIO_MAX_CHANNEL 80
#define HW_RADIO_SETTING_INVALID (HW_RADIO_MAX_CHANNEL+1)

/***************************************************************************
 *
 * HWradio Interface Functions
 *
 ***************************************************************************/
void HWradio_Initialise(void);
void HWradio_Reset(void);
void HWradio_Initialise_RF(u_int32 const* register_setting);


void HWradio_SetNextFrameTxRX_Low(void);
void HWradio_SetCurrentFrameTx_Low(void);    
void HWradio_SetNextFrameTxRX_on(void);
void HWradio_SetNextFrameRX_on(void);

void HWradio_SetTXRX_ovrridelow(void);
void HWradio_SetTX_ovrridelow(void);
void HWradio_SetRX_ovrridelow(void);
void HWradio_CancelTXRX_ovrridelow(void);
void HWradio_SetCurrentFrameRx_Low(void);

void HWradio_Set_DriverData(void);
void HWradio_ADGC_CtrlMode(t_ADGC_CTRL_MODE mode);
void HWradio_SetRadioMode(t_RadioMode in_RadioMode);
t_RadioMode HWradio_GetRadioMode(void);
void HWradio_SetFrequency(t_freq *io_Channels, t_radio_freq_mask freq_mask);
void HWradio_Rx_PacketExtend(void);
void HWradio_Tx_PacketExtend(void);
void HWradio_TxComplete(u_int8 override_enable);
void HWradio_RxComplete(void);

void HWradio_Setup_Radio_For_Next_Half_Slot(t_frame_pos const frame_posn);

void HWradio_Set_Tx_Power_Level(u_int8 power_level);
u_int8 HWradio_Get_Tx_Power_Level(void);

u_int32 HWradio_Get_Radio_Register(u_int32 reg); 
void HWradio_Set_Radio_Register(u_int32 reg, u_int32 val);

s_int8 HWradio_Read_RSSI(void); /* N == RSSI Return, -128 <= N <= 127 */

boolean HWradio_Update_Internal_RSSI_Cache(boolean late_read_opportunity);

t_HWradio_Driver_Status HWradio_Get_Radio_Driver_Status(void);
void HWradio_Enter_Low_Power_Mode_Request(void);
void HWradio_Exit_Low_Power_Mode_Request(void);

#if (BUILD_TYPE==UNIT_TEST_BUILD)
u_int8 HWradio_Get_Last_Tx_Power_Level(void);
#endif

void HWradio_Trim_LPO(void);

s_int8 HWradio_Read_RSSI(void); /* N == RSSI Return, -128 <= N <= 127 */
s_int8 HWradio_Read_Background_RSSI(void);

void HWradio_Setup_Radio_For_Next_Half_Slot(t_frame_pos const frame_posn);

void HWradio_Update_Rx_Gain_If_Reqd(s_int8 rssi);

boolean HWradio_Update_Internal_RSSI_Cache(boolean late_read_opportunity);

void HWradio_Put_Master_Park_Rx_Double_Win(void);

t_HWradio_Driver_Status HWradio_Get_Radio_Driver_Status(void);
void HWradio_Enter_Low_Power_Mode_Request(void);
void HWradio_Exit_Low_Power_Mode_Request(void);
void HWradio_Enter_Low_Power_Mode_Forced(void);

void HWradio_Change_Radio_Modulation(boolean);
boolean HWradio_Read_Radio_Modulation(void);

void HWradio_Assign_TX_START_Channel(u_int8 ch);

#define HWradio_NSC_LMX3162            1
#define HWradio_ALPS_UGSA4_REV_C       2
#define HWradio_ALPS_UGSA4_REV_D       3
#define HWradio_SIWAVE_SIW1502         4
#define HWradio_CONEXANT_CX72303       5
#define HWradio_HD157100               6
#define HWradio_HD157101               7
#define HWradio_HD157102               8

#endif

